搜索资源列表
cymometer6b
- 一个基于alter的FPGA开发的，实用完整的6位十进制频率计。-6-bit cymometer realized by vhdl,it is useful very much.It has been tested and can be used with any change.
EDA
- 一个关于八位十六进制频率计设计的VHDL语言编程 可以下载的哦-a good word about EDA you can get some information from it
EDA_project
- 基于Verilog和VHDL的DDS程序 基于VHDL的8位十进制频率计 -Verilog and VHDL based on the DDS process VHDL-based 8-bit decimal Cymometer
freqtest
- 用VHDL编写频率计，包含QUARTERSII的仿真，很好学习-The preparation of the frequency of use of VHDL, including QUARTERSII of simulation, a very good learning
frecount
- 基于vhdl的频率计控制器模块设计，已经经过调试，可直接调用-Vhdl based on the frequency of the controller module design, debugging has been directly call
FREQ
- 硬件描述语言VHDL的频率计程序,可用于做实验,或者初学者借鉴.-Hardware Descr iption Language VHDL of the frequency counter program can be used for experiments, or the beginners learn.
main
- 交通信号灯 原代码 西安交通大学 电信学院 FPGA设计课下作业-Traffic lights of the original source, Xi' an Jiaotong University School of FPGA design course telecommunication operating under the
Project_of_DDS
- 基于VHDL硬件描述语言的数字频率计设计-Project_of_DDS
FREQTEST.tar
- VHDL写的16进制显示数字频率计，用8位数码管显示-16 hexadecimal display digital frequency meter VHDL
EDA
- 课程实验，VHDL语言实现半加器全加器，频率计等，共四个-eda
div_freq
- 一个数字频率计。利用VHDL实现。有3个VHDL文件组成。其中div_fre为顶层文件-A digital frequency meter. Use of VHDL implementation. There are three VHDL files. One of the top-level document div_fre
frequency_counter
- 数字频率计的FPGA设计与仿真，VHDL版本，适合初学-Digital frequency meter for FPGA Design and Simulation, VHDL version, suitable for beginners
Digitalfrequency
- 数字频率计VHDL程序与仿真,附有仿真截图和源程序注释-Digital frequency meter VHDL procedures and simulation, with simulation screenshots and source code comments
Frequency_Counter
- 基于ep3c25的FPGA频率计的简单设计（用VHDL编写），直接打开即可-FPGA frequency counter based on ep3c25 of simple design (using VHDL written), directly open a can ... ...
freq
- 应用VHDL语言设计低频数字频率计，选择测频法方案，主要是控制电路，由其产生闸门、清零和锁存等信号。-VHDL, design low frequency digital frequency meter, select the frequency method to program, mainly the control circuit, produced by the gate and the latch so clear signal.
pinlvji
- 用vhdl语言写的频率计，可以实现1khz到1Mhz，当低于1Khz时可实现测周期单位为ms，测量精度达到99 ，用数码管动态显示-Vhdl language written with the frequency meter can be achieved 1khz to 1Mhz, when less than 1Khz cycle when unit for detecting ms, 99 accuracy, dynamic display with digital control
PING
- 基于VHDL语言的频率计的设计，可以精确的测试出频率的大小-VHDL language based on the frequency meter is designed to accurately test the frequency of the size of the
aa
- 数字频率计VHDL程序-Digital frequency meter VHDL program
pinlvji
- 基于VHDL的数字频率计的设计-VHDL-based design of digital frequency meter
digitalcymometer
- 基于VHDL的数字频率计，通过硬件实现，效果很好 -digital cymometer design based on vhdl language